درباره ما
SMD-5962-90705
MICROCIRCUITS, DIGITAL, HIGH SPEED CMOS, BCD DECADE COUNTER, ASYNCHRONOUS RESET, MONOLITHIC SILICON
| contributor author | DLA - CC - DLA Land and Maritime | |
| date accessioned | 2017-09-04T18:50:56Z | |
| date available | 2017-09-04T18:50:56Z | |
| date copyright | 04/30/1991 | |
| date issued | 1991 | |
| identifier other | KWAWDAAAAAAAAAAA.pdf | |
| identifier uri | http://yse.yabesh.ir/std;jse/handle/yse/232346 | |
| description abstract | This drawing forms a part of a one part - one part number documentation system (see 6.6 herein). Two product assurance classes consisting of military high reliability (device classes B, Q, and M) and space application (device classes S and V), and a choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). Device class M microcircuits represent non-JAN class B microcircuits in accordance with 1.2.1 of MIL-STD-883, "Provisions for the use of MIL-STD-883 in conjunction with compliant non-JAN devices". When available, a choice of radiation hardness assurance (RHA) levels are reflected in the PIN. The PIN shall be as shown in the following example: Device classes M, B, and S RHA marked devices shall meet the MIL-M-38510 specified RHA levels and shall be marked with the appropriate RHA designator. Device classes Q and V RHA marked devices shall meet the MIL-I-38535 specified RHA levels and shall be marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. The device type(s) shall identify the circuit function as follows: Device type Generic number Circuit function 01 54HCT160 BCD decade counter, asynchronous reset, TTL compatible inputs The device class designator shall be a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for non-JAN class B microcircuits in accordance with 1.2.1 of MIL-STD-883 B or S Certification and qualification to MIL-M-38510 Q or V Certification and qualification to MIL-I-38535 For device classes M, B, and S, case outline(s) shall meet the requirements in appendix C of MIL-M-38510 and as listed below. For device classes Q and V, case outline(s) shall meet the requirements of MIL-I-38535, appendix C of MIL-M-38510, and as listed below. Outline letter Case outline E D-2 (16-lead, .840" × .310" × .200"), dual-in-line package The lead finish shall be as specified in MIL-M-38510 for classes M, B, and S or MIL-I-38535 for classes Q and V. Finish letter "X" shall not be marked on the microcircuit or its packaging. The "X" designation is for use in specifications when lead finishes A, B, and C are considered acceptable and interchangeable without preference. Supply voltage range (VCC) - - - - - - - - - - - - - - - −0.5 V dc to +7.0 V dc DC input voltage - - - - - - - - - - - - - - - - - - - - −0.5 V dc to VCC + 0.5 V dc DC output voltage - - - - - - - - - - - - - - - - - - - - −0.5 V dc to VCC + 0.5 V dc Clamp diode current - - - - - - - - - - - - - - - - - - - ±20 mA DC output current (per pin) - - - - - - - - - - - - - - - ±25 mA DC VCC or GND current (per pin) - - - - - - - - - - - - - ±50 mA Storage temperature range - - - - - - - - - - - - - - - - −65°C to +150°C Maximum power dissipation (PD) - - - - - - - - - - - - - 500 mW 2/ Lead temperature (soldering, 10 seconds) - - - - - - - - +300°C Thermal resistance, junction-to-case (θJC)- - - - - - - - See MIL-M-38510, appendix C Junction temperature (TJ) - - - - - - - - - - - - - - - - +175°C Supply voltage (VCC) - - - - - - - - - - - - - - - - +4.5 V dc to +5.5 V dc Input voltage (VIN) - - - - - - - - - - - - - - - - 0.0 V dc to VCC Output voltage (VOUT) - - - - - - - - - - - - - - - - 0.0 V dc to VCC Case operating temperature (TC) - - - - - - - - - - - −55°C to +125°C Input rise and fall time (tr, tf): VCC = 4.5 V, 5.5 V - - - - - - - - - - - - - - - 0 to 500 ns Minimum setup time, Pn to CP (ts1): TC = +25°C, VCC = 4.5 V - - - - - - - - - - - - - - 10 ns TC = −55°C to +125°C, VCC = 4.5 V - - - - - - - - - 15 ns Minimum setup time, PE to CP, TE to CP (ts2): TC = +25°C, VCC = 4.5 V - - - - - - - - - - - - - - 13 ns TC = −55°C to +125°C, VCC = 4.5 V - - - - - - - - - 20 ns Minimum setup time, [S bar][P bar][E bar] to CP (ts3): TC = +25°C, VCC = 4.5 V - - - - - - - - - - - - - - 12 ns TC = −55°C to +125°C, VCC = 4.5 V - - - - - - - - - 18 ns Minimum pulse width, CP (tw1): TC = +25°C, VCC = 4.5 V - - - - - - - - - - - - - - 16 ns TC = −55°C to +125°C, VCC = 4.5 V - - - - - - - - - 24 ns Minimum pulse width, [M bar][R bar] (tw2): TC = +25°C, VCC = 4.5 V - - - - - - - - - - - - - - 20 ns TC = −55°C to +125°C, VCC = 4.5 V - - - - - - - - - 30 ns Minimum hold time, Pn to CP (th1): TC = +25°C, VCC = 4.5 V - - - - - - - - - - - - - - 5 ns TC = −55°C to +125°C, VCC = 4.5 V - - - - - - - - - 5 ns Minimum hold time, TE to CP, PE to CP(th2): TC = +25°C, VCC = 4.5 V - - - - - - - - - - - - - - 3 ns TC = −55°C to +125°C, VCC = 4.5 V - - - - - - - - - 3 ns Minimum hold time, [S bar][P bar][E bar] to CP (th3): TC = +25°C, VCC = 4.5 V - - - - - - - - - - - - - - 3 ns TC = −55°C to +125°C, VCC = 4.5 V - - - - - - - - - 3 ns Minimum recovery time, [M bar][R bar] to CP (tREC): TC = +25°C, VCC = 4.5 V - - - - - - - - - - - - - - 15 ns TC = −55°C to +125°C, VCC = 4.5 V - - - - - - - - - 22 ns Maximum clock frequency, CP (fMAX): TC = +25°C, VCC = 4.5 V - - - - - - - - - - - - - - 30 MHz TC = −55°C to +125°C, VCC = 4.5 V - - - - - - - - - 20 MHz Fault coverage measurement of manufacturing logic tests (MIL-STD-883, test method 5012) - - - - - XX percent 3/ Intended Use: Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes. Microcircuits covered by this drawing will replace the same generic device covered by a contractor-prepared specification or drawing. Device classes B and Q devices will replace device class M devices. | |
| language | English | |
| title | SMD-5962-90705 | num |
| title | MICROCIRCUITS, DIGITAL, HIGH SPEED CMOS, BCD DECADE COUNTER, ASYNCHRONOUS RESET, MONOLITHIC SILICON | en |
| type | standard | |
| page | 18 | |
| status | Active | |
| tree | DLA - CC - DLA Land and Maritime:;1991 | |
| contenttype | fulltext |
