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JEDEC JEP123
Guideline for Measurement of Electronic Package Inductance and Capacitance Model Parameters
| contributor author | JEDEC - Solid State Technology Association | |
| date accessioned | 2017-09-04T16:57:18Z | |
| date available | 2017-09-04T16:57:18Z | |
| date copyright | 34973 | |
| date issued | 1995 | |
| identifier other | XGILCAAAAAAAAAAA.pdf | |
| identifier uri | http://yse.yabesh.ir/std;jsery=auth=4703AF67081DAC4/handle/yse/120810 | |
| description abstract | The need for this guideline arose from widespread lack of consistency in characterizing electrical parameters of electronic packages, which existed in the industry until the early 1990s. Then, the JEDEC Committee JC-15 provided the forum where various methods were discussed and commonality in approach emerged. The result is that today we have relatively consistent results in measuring and reporting electrical package parameters, as well as specialized tools (e.g., the IPA-510, the interconnect parameter analyzer) which were developed to support the methodology. | |
| language | English | |
| title | JEDEC JEP123 | num |
| title | Guideline for Measurement of Electronic Package Inductance and Capacitance Model Parameters | en |
| type | standard | |
| page | 25 | |
| status | Active | |
| tree | JEDEC - Solid State Technology Association:;1995 | |
| contenttype | fulltext | |
| subject keywords | Capacitance Model | |
| subject keywords | Inductance Model | |
| subject keywords | Measurement - Package Inductance/Capacitance Model Parameters |
