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NASA-LLIS-2041

Lessons Learned – MRO Spaceflight Computer Side Swap Anomalies [Export Version]

contributor authorNASA - National Aeronautics and Space Administration (NASA)
date accessioned2017-09-04T18:28:29Z
date available2017-09-04T18:28:29Z
date copyright39798
date issued2008
identifier otherIQYCQCAAAAAAAAAA.pdf
identifier urihttp://yse.yabesh.ir/std;jsery=autho146/handle/yse/210693
description abstractAbstract:
A few months into its mission, MRO began experiencing unexpected side swaps to the redundant flight computer that placed the spacecraft into safe mode. The problem was traced to subtle inconsistencies between the MRO design implementation of an ASIC device and a known limitation of that device. Users of the RAD750 spaceflight computer should assure that the "PPCI Erratum 24" ASIC defect cannot cause excessive accumulation of uncorrectable SDRAM memory errors, and that the system architecture has robust error recovery capabilities.
languageEnglish
titleNASA-LLIS-2041num
titleLessons Learned – MRO Spaceflight Computer Side Swap Anomalies [Export Version]en
typestandard
page4
statusActive
treeNASA - National Aeronautics and Space Administration (NASA):;2008
contenttypefulltext
subject keywords1.Computers
subject keywords1.Engineering design and project processes and standards
subject keywords1.Flight Equipment
subject keywords1.Flight Operations
subject keywords1.Ground Equipment
subject keywords1.Hardware
subject keywords1.Payloads
subject keywords1.Software
subject keywords1.Software Engineering
subject keywords1.Spacecraft
subject keywords1.Spacecraft and Spacecraft Instruments


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