JEDEC JESD82-4B

Definition of the SSTV16859 2.5 V 13-Bit to 26-Bit SSTL_2 Registered Buffer for Stacked DDR DIMM Applications

contributor author	JEDEC - Solid State Technology Association
date accessioned	2017-09-04T17:28:01Z
date available	2017-09-04T17:28:01Z
date copyright	05/01/2003
date issued	2003
identifier other	COMZCBAAAAAAAAAA.pdf
identifier uri	http://yse.yabesh.ir/std;jsessionid=22E9669814B1A2CD62B816A309F4CAB6/handle/yse/151177
description abstract	This standard defines standard specifications of dc interface parameters, switching parameters, and test loading for definition of the SSTV16859 13-bit to 26-bit SSTL_2 registered buffer for stacked DDR DIMM applications. The purpose is to provide a standard for the SSTV16859 logic device, for uniformity, multiplicity of sources, elimination of confusion, ease of device specification, and ease of use.
language	English
title	JEDEC JESD82-4B	num
title	Definition of the SSTV16859 2.5 V 13-Bit to 26-Bit SSTL_2 Registered Buffer for Stacked DDR DIMM Applications	en
type	standard
page	17
status	Active
tree	JEDEC - Solid State Technology Association:;2003
contenttype	fulltext
subject keywords	DIMM
subject keywords	Registered Buffer
subject keywords	SSTV16859
subject keywords	Stacked DDR