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JEDEC JESD8-22A
HSUL_12 LPDDR2 and LPDDR3 I/O with Optional ODT
| contributor author | JEDEC - Solid State Technology Association | |
| date accessioned | 2017-09-04T18:13:57Z | |
| date available | 2017-09-04T18:13:57Z | |
| date copyright | 41183 | |
| date issued | 2012 | |
| identifier other | HGKUAFAAAAAAAAAA.pdf | |
| identifier uri | http://yse.yabesh.ir/std;jse/handle/yse/196927 | |
| description abstract | This standard defines the input, output specifications and ac test conditions for devices that are designed to operate in the High Speed Unterminated Logic (HSUL_12) logic switching range, nominally 0 V to 1.2 V. The standard may be applied to ICs operating with separate VDD and VDDQ supply voltages. | |
| language | English | |
| title | JEDEC JESD8-22A | num |
| title | HSUL_12 LPDDR2 and LPDDR3 I/O with Optional ODT | en |
| type | standard | |
| page | 38 | |
| status | Active | |
| tree | JEDEC - Solid State Technology Association:;2012 | |
| contenttype | fulltext |
