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Ball Grid Array Pinouts Standardized for 32-Bit Logic Functions

contributor authorJEDEC - Solid State Technology Association
date accessioned2017-09-04T17:10:50Z
date available2017-09-04T17:10:50Z
date copyright36465
date issued1999
identifier otherYQXYJAAAAAAAAAAA.pdf
identifier urihttp://yse.yabesh.ir/std;jsessioutho162s93F7081D544/handle/yse/134417
description abstractThe purpose of this standard is to provide a pinout standard for dual-die 32-bit logic devices offered in a 96- and 144-ball grid array package for uniformity, multiplicity of sources, elimination of confusion, ease of device specification, and ease use. This standard defines device output for 32-bit wide buffer, driver and transceiver functions. This pinout specifically applies to the conversion of DIP-packaged 16-bit logic devices to LFBGA-packaged dual-die 32-bit logic devices.
languageEnglish
titleJEDEC JESD75num
titleBall Grid Array Pinouts Standardized for 32-Bit Logic Functionsen
typestandard
page10
statusActive
treeJEDEC - Solid State Technology Association:;1999
contenttypefulltext
subject keywords32-Bit Logic Functions
subject keywordsBall Grid Array Pinouts
subject keywordsLFBGA
subject keywordsLow Profile


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