JEDEC JESD51-10

Test Boards for Through-Hole Perimeter Leaded Package Thermal Measurements

contributor author	JEDEC - Solid State Technology Association
date accessioned	2017-09-04T17:39:41Z
date available	2017-09-04T17:39:41Z
date copyright	07/01/2000
date issued	2000
identifier other	DTJZMAAAAAAAAAAA.pdf
identifier uri	http://yse.yabesh.ir/std;jsessioutho9279AF67081DAC4/handle/yse/162705
description abstract	This standard covers the design of printed circuit boards (PCBs) used in the thermal characterization of Dual-Inline Packages (DIP) and Single-Inline Packages (SIP). It is intended to be used in conjunction with the JESD51 series of standards that cover the test methods and test environments. JESD51-10 was developed to give a figure-of-merit of thermal performance that allows for accurate comparisons of packages from different suppliers. It can be used to give a first order approximation of system performance and, in conjunction with the other JESD51 PCB standards, allows for comparisons of the various package families.
language	English
title	JEDEC JESD51-10	num
title	Test Boards for Through-Hole Perimeter Leaded Package Thermal Measurements	en
type	standard
page	18
status	Active
tree	JEDEC - Solid State Technology Association:;2000
contenttype	fulltext
subject keywords	DIP
subject keywords	Thermal Measurements
subject keywords	Through-Hole Packages