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JEDEC JESD12-5
Design for Testability Guidelines
| contributor author | JEDEC - Solid State Technology Association | |
| date accessioned | 2017-09-04T15:44:30Z | |
| date available | 2017-09-04T15:44:30Z | |
| date copyright | 01/01/1988 | |
| date issued | 1988 | |
| identifier other | PPIHCAAAAAAAAAAA.pdf | |
| identifier uri | http://yse.yabesh.ir/std;quein=autho/handle/yse/46897 | |
| description abstract | This standard is intended to provide circuit designers with the information needed to develop complex integrated circuits that can be reliably and economically tested without compromising flexibility. | |
| language | English | |
| title | JEDEC JESD12-5 | num |
| title | Design for Testability Guidelines | en |
| type | standard | |
| page | 84 | |
| status | Active | |
| tree | JEDEC - Solid State Technology Association:;1988 | |
| contenttype | fulltext | |
| subject keywords | Design - Testability | |
| subject keywords | Testability Guidelines |
