JEDEC JESD8-4

Center-Tap-Terminated (CTT) Low-Level, High- Speed Interface Standard for Digital Integrated Circuits

contributor author	JEDEC - Solid State Technology Association
date accessioned	2017-09-04T15:31:25Z
date available	2017-09-04T15:31:25Z
date copyright	01/01/1993
date issued	1993
identifier other	ODQZCAAAAAAAAAAA.pdf
identifier uri	http://yse.yabesh.ir/std;quein=autho123393FD081DAC4/handle/yse/32959
description abstract	This Addendum No. 4 to JEDEC Standard No. 8 defines the dc input and output specifications for a low-level, high-speed interface for integrated devices that can be a super-set of LVCMOS and LVTTL.
language	English
title	JEDEC JESD8-4	num
title	Center-Tap-Terminated (CTT) Low-Level, High- Speed Interface Standard for Digital Integrated Circuits	en
type	standard
page	7
status	Active
tree	JEDEC - Solid State Technology Association:;1993
contenttype	fulltext
subject keywords	Center Tap Terminated - CTT
subject keywords	High Speed Interface - Digital Integrated Circuits
subject keywords	LVCMOS
subject keywords	LVTTL