JEDEC JESD306

Measurement of Small Signal HF, VHF, and UHF Power Gain of Transistors

contributor author	JEDEC - Solid State Technology Association
date accessioned	2017-09-04T15:51:00Z
date available	2017-09-04T15:51:00Z
date copyright	05/01/1965 (R 2009)
date issued	2009
identifier other	QIRUMEAAAAAAAAAA.pdf
identifier uri	http://yse.yabesh.ir/std;quein=autho123393FD081DAC4/handle/yse/54164
description abstract	The generator shall have an output impedance of 50 ohms. The attenuator shall be designed to work in a 50 ohm line. The detector and load shall have a 50 ohm input impedance. Network S₁ shall be a single-tuned network designed to operate from a 50 ohm source. Network S2 shall be a single-tuned network designed to operate with a 50 ohm load. Network T is a neutralization network and should be used if specified. The common terminal and the operating biases of the transistor under test shall be specified. Good engineering practice must be used in bypassing bias supplies, shielding individual portions of the circuit, and in minimizing the effects of ground currents. The test circuit for the transistor shall be constructed such that it follows in form the specified test circuit, and it shall have values approximately equal to the nominal values specified for the test circuit.
language	English
title	JEDEC JESD306	num
title	Measurement of Small Signal HF, VHF, and UHF Power Gain of Transistors	en
type	standard
page	12
status	Active
tree	JEDEC - Solid State Technology Association:;2009
contenttype	fulltext