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JEDEC JESD71
Standard Test and Programming Language (STAPL)
| contributor author | JEDEC - Solid State Technology Association | |
| date accessioned | 2017-09-04T16:10:14Z | |
| date available | 2017-09-04T16:10:14Z | |
| date copyright | 08/01/1999 | |
| date issued | 1999 | |
| identifier other | SIWHJAAAAAAAAAAA.pdf | |
| identifier uri | http://yse.yabesh.ir/std;quein=autho123393FD081DAC4/handle/yse/73487 | |
| description abstract | STAPL is a vendor- and platform-independent language for programming and testing devices via the IEEE standard 1149.1 interface, commonly known as JTAG. STAPL enables programming of designs into programmable logic devices (PLDs) offered by a variety of PLD vendors. STAPL is also suitable for testing 1149.1-compliant devices. | |
| language | English | |
| title | JEDEC JESD71 | num |
| title | Standard Test and Programming Language (STAPL) | en |
| type | standard | |
| page | 47 | |
| status | Active | |
| tree | JEDEC - Solid State Technology Association:;1999 | |
| contenttype | fulltext | |
| subject keywords | JTAG | |
| subject keywords | Programmable Devices | |
| subject keywords | Programmable Language | |
| subject keywords | STAPL |
