JEDEC JESD18-A

Standard for Description of Fast CMOS TTL Compatible Logic

contributor author	JEDEC - Solid State Technology Association
date accessioned	2017-09-04T17:18:52Z
date available	2017-09-04T17:18:52Z
date copyright	01/01/1993
date issued	1993
identifier other	ZLTXCAAAAAAAAAAA.pdf
identifier uri	http://yse.yabesh.ir/std;query=autho1216AF679DDCAC4/handle/yse/142085
description abstract	The purpose of this standard is to provide for uniformity, multiplicity of sources, elimination of confusion, and ease of device specification and design by users. The standard covers specifications for description of '54/74FCTXXXX' series fast CMOS TTL compatible devices.
language	English
title	JEDEC JESD18-A	num
title	Standard for Description of Fast CMOS TTL Compatible Logic	en
type	standard
page	43
status	Active
tree	JEDEC - Solid State Technology Association:;1993
contenttype	fulltext
subject keywords	CMOS Devices - Fast
subject keywords	Description - Fast CMOS TTL Compatible Logic
subject keywords	TTL Compatible Logic