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IPC TM-650 2.5.6.1B
Solder Mask - Dielectric Strength
| contributor author | IPC - Association Connecting Electronics Industries | |
| date accessioned | 2017-09-04T18:44:37Z | |
| date available | 2017-09-04T18:44:37Z | |
| date copyright | 03/01/2007 | |
| date issued | 2007 | |
| identifier other | KFHVACAAAAAAAAAA.pdf | |
| identifier uri | http://yse.yabesh.ir/std;query=autho162sear/handle/yse/226123 | |
| description abstract | The dielectric strength test (also called highpotential [Hi-Pot], over potential, or voltage breakdown) consists of the application of a test voltage for a specific time between mutually insulated portions of a printed board or between insulated portions and ground. This is used to prove that the printed board can operate safely at its rated voltage and withstand momentary overpotentials due to switching, surges, and other similar phenomena. | |
| language | English | |
| title | IPC TM-650 2.5.6.1B | num |
| title | Solder Mask - Dielectric Strength | en |
| type | standard | |
| page | 1 | |
| status | Active | |
| tree | IPC - Association Connecting Electronics Industries:;2007 | |
| contenttype | fulltext |
