IPC J-STD-027

Mechanical Outline Standard for Flip Chip and Chip Size Configurations

contributor author	IPC - Association Connecting Electronics Industries
date accessioned	2017-09-04T18:04:44Z
date available	2017-09-04T18:04:44Z
date copyright	02/01/2003
date issued	2003
identifier other	GHPZCBAAAAAAAAAA.pdf
identifier uri	http://yse.yabesh.ir/std;query=autho18267D83FCDCAC6/handle/yse/187634
description abstract	This standard establishes mechanical outline requirements for devices supplied in flip chip or Chip Size Package (CSP) formats, including die surface, die terminals, and interconnection balls/bumps/lands to the next level. Purpose The purpose of this standard is to establish a family of mechanical outlines and footprints for both the device and the interconnection scheme. Interconnection ball/bump/land size, pitch, configuration, coplanarity, and associated tolerances are included in this standard.
language	English
title	IPC J-STD-027	num
title	Mechanical Outline Standard for Flip Chip and Chip Size Configurations	en
type	standard
page	20
status	Active
tree	IPC - Association Connecting Electronics Industries:;2003
contenttype	fulltext