JEDEC JESD75-4

Ball Grid Array Pinout for 1-, 2-, and 3-Bit Logic Functions

contributor author	JEDEC - Solid State Technology Association
date accessioned	2017-09-04T15:45:29Z
date available	2017-09-04T15:45:29Z
date copyright	03/01/2004
date issued	2004
identifier other	PSGYEBAAAAAAAAAA.pdf
identifier uri	http://yse.yabesh.ir/std;query=autho1826AF679/handle/yse/48009
description abstract	This standard defines device pinout for 1-, 2- and 3-bit wide logic functions. This pinout specifically applies to the conversion of Dual-Inline-Packaged (DIP) 1-, 2- and 3-bit logic devices to DSBGA-packaged 1-, 2- and 3-bit logic devices.
language	English
title	JEDEC JESD75-4	num
title	Ball Grid Array Pinout for 1-, 2-, and 3-Bit Logic Functions	en
type	standard
page	13
status	Active
tree	JEDEC - Solid State Technology Association:;2004
contenttype	fulltext
subject keywords	Ball Grid Array
subject keywords	BGA
subject keywords	DSBGA
subject keywords	WCSP Logic