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DDR3 SDRAM Specification

contributor authorJEDEC - Solid State Technology Association
date accessioned2017-09-04T15:11:53Z
date available2017-09-04T15:11:53Z
date copyright07/01/2012
date issued2012
identifier otherLVPAYEAAAAAAAAAA.pdf
identifier urihttp://yse.yabesh.ir/std;query=autho1826AF679D/handle/yse/10313
description abstractThis document defines the DDR3 SDRAM specification, including features, functionalities, AC and DC characteristics, packages, and ball/signal assignments. The purpose of this Specification is to define the minimum set of requirements for JEDEC compliant 512 Mb through 8 Gb for x4, x8, and x16 DDR3 SDRAM devices. This specification was created based on the DDR2 specification (JESD79-2) and some aspects of the DDR specification (JESD79). Each aspect of the changes for DDR3 SDRAM operation were considered and approved by committee ballot(s). The accumulation of these ballots were then incorporated to prepare this JESD79-3 specification, replacing whole sections and incorporating the changes into Functional Description and Operation.
languageEnglish
titleJEDEC JESD79-3Fnum
titleDDR3 SDRAM Specificationen
typestandard
page226
statusActive
treeJEDEC - Solid State Technology Association:;2012
contenttypefulltext


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