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JEDEC JESD82-19A
Definition of the SSTUA32S865 DDR2 RDIMM Applications Registered Buffer with Parity for and SSTUA32D865 28-bit 1:2
| contributor author | JEDEC - Solid State Technology Association | |
| date accessioned | 2017-09-04T15:33:42Z | |
| date available | 2017-09-04T15:33:42Z | |
| date copyright | 05/01/2007 | |
| date issued | 2007 | |
| identifier other | OKJEACAAAAAAAAAA.pdf | |
| identifier uri | http://yse.yabesh.ir/std;query=autho1826AF679D/handle/yse/35374 | |
| description abstract | This standard defines standard specifications of dc interface parameters, switching parameters, and test loading for definition of the SSTUA32S865 and SSTUA32D865 registered buffer with parity for 2 rank by 4 or similar high-density DDR2 RDIMM applications. | |
| language | English | |
| title | JEDEC JESD82-19A | num |
| title | Definition of the SSTUA32S865 DDR2 RDIMM Applications Registered Buffer with Parity for and SSTUA32D865 28-bit 1:2 | en |
| type | standard | |
| page | 30 | |
| status | Active | |
| tree | JEDEC - Solid State Technology Association:;2007 | |
| contenttype | fulltext | |
| subject keywords | DDR2. RDIMM | |
| subject keywords | Registered Buffer | |
| subject keywords | SSTU | |
| subject keywords | SSTU32865 | |
| subject keywords | SSTUA32865 | |
| subject keywords | SSTUA32D865 | |
| subject keywords | SSTUA32S865 |
