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IEC 61523-1:2023-10 (IEEE Std 1481-2019)

contributor authorIEEE - The Institute of Electrical and Electronics Engineers, Inc.
date accessioned2024-12-17T08:08:42Z
date available2024-12-17T08:08:42Z
date copyright18 October 2023
date issued2023
identifier other10287889.pdf
identifier urihttp://yse.yabesh.ir/std;query=authoF23793FDFCDCAC426159DD6EFDEC014A/handle/yse/336266
description abstractWays for integrated circuit designers to analyze chip timing and power consistently across a broad set of electrical design automation (EDA) applications are covered in this standard. Methods by which integrated circuit vendors can express timing and power information once per given technology are also covered. In addition, the means by which EDA vendors can meet their application performance and capacity needs are discussed.
languageEnglish
publisherIEEE - The Institute of Electrical and Electronics Engineers, Inc.
titleIEEE/IEC International Standard--Delay and power calculation standards--Part 1: Integrated Circuit (IC) Open Library Architecture (OLA)en
titleIEC 61523-1:2023-10 (IEEE Std 1481-2019)num
typestandard
page646
statusActive
treeIEEE - The Institute of Electrical and Electronics Engineers, Inc.:;2023
contenttypefulltext
subject keywordspower calculation
subject keywordsChip delay
subject keywordsintegrated circuit (IC) design
subject keywordselectronic design automation (EDA)
subject keywordsIEEE 1481TM
identifier DOI10.1109/IEEESTD.2023.10287889


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