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Sectional Requirements for Electronic Diagramming Symbol Generation Methodology

contributor authorIPC - Association Connecting Electronics Industries
date accessioned2017-09-04T18:09:17Z
date available2017-09-04T18:09:17Z
date copyright03/01/2010
date issued2010
identifier otherADKGRCAAAAAAAAAA.pdf
identifier urihttp://yse.yabesh.ir/std;query=authoF237ear369B7AC426159DD6EFDEC9FCD/handle/yse/192295
description abstractThis standard establishes the requirements for generation of electronic symbols used in the documentation of electronic diagrams that define the electrical interconnectivity of electronic parts. The descriptions pertain to schematic symbols, logic symbols or Boolean truth tables required to define the circuit configuration. Where appropriate the standard also includes methodology for defining circuit flow, electrical or functional restrictions, or maintenance test procedures used to design or maintain the electronic product. The requirements pertain to both hard copy and electronic data descriptions.
Purpose
The purpose of the standard is to develop a protocol that fits well into both manual and automated documentation of electronic diagrams. In addition, the methodology permits the symbols to be placed and adjusted in a manner that facilitates showing how an electronic function can interact with other functions. In this regard, the symbol Input, Output, ground and voltage arrangement must fall on some form of the Cartesian coordinate system in order to facilitate the use of the symbols in automated diagramming tools.
languageEnglish
titleIPC 2612-1num
titleSectional Requirements for Electronic Diagramming Symbol Generation Methodologyen
typestandard
page44
statusActive
treeIPC - Association Connecting Electronics Industries:;2010
contenttypefulltext


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