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Stress-Test-Driven Qualification of and Failure Mechanisms Associated with Assembled Solid State Surface- Mount Components

contributor authorJEDEC - Solid State Technology Association
date accessioned2017-09-04T16:57:37Z
date available2017-09-04T16:57:37Z
date copyright06/01/2006
date issued2006
identifier otherXHGGJBAAAAAAAAAA.pdf
identifier urihttp://yse.yabesh.ir/std;quessionid=2A40ear/handle/yse/121152
description abstractThe purpose of this document is to explain the meaning of SPD setting (JESD21 SPD section) for DDR2 SDRAM (JESD79-2) in normal and extended temperature operationy67.
languageEnglish
titleJEDEC JEP179num
titleStress-Test-Driven Qualification of and Failure Mechanisms Associated with Assembled Solid State Surface- Mount Componentsen
typestandard
page10
statusActive
treeJEDEC - Solid State Technology Association:;2006
contenttypefulltext
subject keywordsDDR2
subject keywordsRefresh Operation
subject keywordsSPD
subject keywordsTemperature Range


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