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IEEE 1801
Design and Verification of Low-Power Integrated Circuits - IEEE Computer Society
| contributor author | IEEE - The Institute of Electrical and Electronics Engineers, Inc. | |
| date accessioned | 2017-09-04T17:27:12Z | |
| date available | 2017-09-04T17:27:12Z | |
| date copyright | 03/06/2013 | |
| date issued | 2013 | |
| identifier other | CMKJDFAAAAAAAAAA.pdf | |
| identifier uri | https://yse.yabesh.ir/std/handle/yse/150355 | |
| description abstract | This standard establishes a format used to define the low-power design intent for electronic systems and electronic intellectual property (IP). The format provides the ability to specify the supply network, switches, isolation, retention, and other aspects relevant to power management of an electronic system. The standard defines the relationship between the low-power design specification and the logic design specification captured via other formats [e.g., standard hardware description languages (HDLs)]. Purpose The standard provides portability of low-power design specifications that can be used with a variety of commercial products throughout an electronic system design, analysis, verification, and implementation flow. | |
| language | English | |
| title | IEEE 1801 | num |
| title | Design and Verification of Low-Power Integrated Circuits - IEEE Computer Society | en |
| type | standard | |
| page | 348 | |
| status | Active | |
| tree | IEEE - The Institute of Electrical and Electronics Engineers, Inc.:;2013 | |
| contenttype | fulltext |
