درباره ما
DSCC-VID-V62/03668 REV A
MICROCIRCUIT, DIGITAL, CMOS, EMBEDDED TEST-BUS CONTROLLER, IEEE STD 1149.1 (JTAG) TAP MASTERS WITH 8-BIT GENERIC HOST INTERFACES, MONOLITHIC SILICON
| contributor author | DLA - CC - DLA Land and Maritime | |
| date accessioned | 2017-09-04T17:40:40Z | |
| date available | 2017-09-04T17:40:40Z | |
| date copyright | 03/12/2008 | |
| date issued | 2008 | |
| identifier other | DVVOCCAAAAAAAAAA.pdf | |
| identifier uri | https://yse.yabesh.ir/std/handle/yse/163648 | |
| description abstract | This drawing documents the general requirements of a high performance embedded test-bus controller, IEEE Std 1149.1 (JTAG) TAP masters with 8-bit generic host interfaces microcircuit, with an operating temperature range of -40°C to +85°C. | |
| language | English | |
| title | DSCC-VID-V62/03668 REV A | num |
| title | MICROCIRCUIT, DIGITAL, CMOS, EMBEDDED TEST-BUS CONTROLLER, IEEE STD 1149.1 (JTAG) TAP MASTERS WITH 8-BIT GENERIC HOST INTERFACES, MONOLITHIC SILICON | en |
| type | standard | |
| page | 17 | |
| status | Active | |
| tree | DLA - CC - DLA Land and Maritime:;2008 | |
| contenttype | fulltext |
