درباره ما
DSCC-VID-V62/06602 REV A
MICROCIRCUIT, DIGITAL-LINEAR, 2.7 V TO 5.5 V 12 BIT 3 μs QUADRUPLE DIGITAL TO ANALOG CONVERTER WITH POWER DOWN, MONOLITHIC SILICON
| contributor author | DLA - CC - DLA Land and Maritime | |
| date accessioned | 2017-09-04T18:10:42Z | |
| date available | 2017-09-04T18:10:42Z | |
| date copyright | 01/19/2012 | |
| date issued | 2012 | |
| identifier other | GXVEUEAAAAAAAAAA.pdf | |
| identifier uri | https://yse.yabesh.ir/std/handle/yse/193676 | |
| description abstract | This drawing documents the general requirements of a high performance 2.7 V to 5.5 V 12 bit 3 µs quadruple digital to analog converter with power down microcircuit, with an operating temperature range of -55°C to +125°C. | |
| language | English | |
| title | DSCC-VID-V62/06602 REV A | num |
| title | MICROCIRCUIT, DIGITAL-LINEAR, 2.7 V TO 5.5 V 12 BIT 3 μs QUADRUPLE DIGITAL TO ANALOG CONVERTER WITH POWER DOWN, MONOLITHIC SILICON | en |
| type | standard | |
| page | 12 | |
| status | Active | |
| tree | DLA - CC - DLA Land and Maritime:;2012 | |
| contenttype | fulltext |
