درباره ما
SMD-5962-89950 REV B
MICROCIRCUIT, DIGITAL, , ADVANCED CMOS, DUAL NEGATIVE EDGE TRIGGERED JK FLIPFLOP WITH ASYNCHRONOUS SET AND CLEAR, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON
| contributor author | DLA - CC - DLA Land and Maritime | |
| date accessioned | 2017-09-04T18:26:14Z | |
| date available | 2017-09-04T18:26:14Z | |
| date copyright | 41262 | |
| date issued | 2012 | |
| identifier other | AHVGBFAAAAAAAAAA.pdf | |
| identifier uri | https://yse.yabesh.ir/std/handle/yse/208384 | |
| description abstract | This drawing documents two product assurance class levels consisting of high reliability (device classes M, Q, and B) and space application (device classes S and V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN.Intended Use: Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes. | |
| language | English | |
| title | SMD-5962-89950 REV B | num |
| title | MICROCIRCUIT, DIGITAL, , ADVANCED CMOS, DUAL NEGATIVE EDGE TRIGGERED JK FLIPFLOP WITH ASYNCHRONOUS SET AND CLEAR, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON | en |
| type | standard | |
| page | 21 | |
| status | Active | |
| tree | DLA - CC - DLA Land and Maritime:;2012 | |
| contenttype | fulltext |
