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Semiconductor Design Standard for Flip Chip Applications - IPC/EIA J-STD-026

contributor authorTIA - Telecommunications Industry Association
date accessioned2017-09-04T16:21:31Z
date available2017-09-04T16:21:31Z
date copyright08/01/1999
date issued1999
identifier otherTNSHKAAAAAAAAAAA.pdf
identifier urihttps://yse.yabesh.ir/std/handle/yse/84950
description abstractThis standard addresses semiconductor chip design. It is intended for applications utilizing standard substrates, materials, assembly, and test methods as well as established semiconductor fabrication and bumping processes.
Purpose
The purpose is to provide flip chip design standards which are commensurate with established fabrication, bump, test, assembly, handling and application practices. Addressed are electrical, thermal, and mechanical chip design parameters and methodologies as well as the reliability associated with these items. These standards are intended for new designs as well as modifications of non-flip chip designs.

 
languageEnglish
titleTIA J-STD-026num
titleSemiconductor Design Standard for Flip Chip Applications - IPC/EIA J-STD-026en
typestandard
page45
statusActive
treeTIA - Telecommunications Industry Association:;1999
contenttypefulltext


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