JEDEC JESD12-1B

Terms and Definitions for Gate Arrays and Cell-Based Digital Integrated Circuits

contributor author	JEDEC - Solid State Technology Association
date accessioned	2017-09-04T15:17:30Z
date available	2017-09-04T15:17:30Z
date copyright	01/01/1993
date issued	1993
identifier other	MNEVCAAAAAAAAAAA.pdf
identifier uri	http://yse.yabesh.ir/std/handle/yse/16936
description abstract	The purpose of this standard is to promote the uniform use of abbreviations, terms, and definitions throughout the semiconductor industry. It is a useful guide for users, manufactures, educators, technical writers, and others interested in the characterization, nomenclature, and classification of semicustom integrated circuits.
language	English
title	JEDEC JESD12-1B	num
title	Terms and Definitions for Gate Arrays and Cell-Based Digital Integrated Circuits	en
type	standard
page	18
status	Active
tree	JEDEC - Solid State Technology Association:;1993
contenttype	fulltext
subject keywords	Gate Array
subject keywords	Semicustom Integrated Circuits
subject keywords	Terms and Definitions - Cell-Based
subject keywords	Terms and Definitions - Gate Array