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Package Warpage Measurement of Surface-Mount Integrated Circuits at Elevated Temperature

contributor authorJEDEC - Solid State Technology Association
date accessioned2017-09-04T15:27:28Z
date available2017-09-04T15:27:28Z
date copyright40087
date issued2009
identifier otherAVMXOCAAAAAAAAAA.pdf
identifier urihttp://yse.yabesh.ir/std/handle/yse/28368
description abstractThe purpose of this test method is to measure the deviation from uniform flatness of an integrated circuit package body for the range of environmental conditions experienced during the surface-mount soldering operation.
languageEnglish
titleJEDEC JESD22-B112Anum
titlePackage Warpage Measurement of Surface-Mount Integrated Circuits at Elevated Temperatureen
typestandard
page30
statusActive
treeJEDEC - Solid State Technology Association:;2009
contenttypefulltext
subject keywordsHigh Temperature
subject keywordsMeasurement
subject keywordsMethodology
subject keywordsPackage
subject keywordsTest Method
subject keywordsWarpage


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