JEDEC JESD24-9
Short Circuit Withstand Time Test Method - Addendum to JEDEC JESD 24
| contributor author | JEDEC - Solid State Technology Association | |
| date accessioned | 2017-09-04T15:43:21Z | |
| date available | 2017-09-04T15:43:21Z | |
| date copyright | 08/01/1992 (R 2002) | |
| date issued | 2002 | |
| identifier other | PLTZJBAAAAAAAAAA.pdf | |
| identifier uri | http://yse.yabesh.ir/std/handle/yse/45594 | |
| description abstract | Test method to determine how long a device can survive a short circuit condition with a given drive level. | |
| language | English | |
| title | JEDEC JESD24-9 | num |
| title | Short Circuit Withstand Time Test Method - Addendum to JEDEC JESD 24 | en |
| type | standard | |
| page | 12 | |
| status | Active | |
| tree | JEDEC - Solid State Technology Association:;2002 | |
| contenttype | fulltext | |
| subject keywords | Short Circuit Withstand Time | |
| subject keywords | Test Method - Short Circuit Withstand Time | |
| subject keywords | Withstand Time - Short Circuit |

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