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IPC IPC/EIA J-STD-028
Performance Standard for Construction of Flip Chip and Chip Scale Bumps
| contributor author | IPC - Association Connecting Electronics Industries | |
| date accessioned | 2017-09-04T18:48:23Z | |
| date available | 2017-09-04T18:48:23Z | |
| date copyright | 08/01/1999 | |
| date issued | 1999 | |
| identifier other | KOSHKAAAAAAAAAAA.pdf | |
| identifier uri | http://yse.yabesh.ir/std;jsery=autho162s7D83081DAC426159DD6EFDEC014A/handle/yse/229658 | |
| description abstract | This standard establishes the construction detail requirements for bumps and other terminal structures on flip chips and chip scale carriers. All flip chip and chip scale device terminals shall meet the designated standards detailed in this document which includes such diverse terminations as solder bumps, columns, non-melting stand-offs and conductive polymer deposits. The specific standards for different terminations will therefore be appropriately matched to the particular interconnection. | |
| language | English | |
| title | IPC IPC/EIA J-STD-028 | num |
| title | Performance Standard for Construction of Flip Chip and Chip Scale Bumps | en |
| type | standard | |
| page | 36 | |
| status | Active | |
| tree | IPC - Association Connecting Electronics Industries:;1999 | |
| contenttype | fulltext |
