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IPC IPC/EIA J-STD-028

Performance Standard for Construction of Flip Chip and Chip Scale Bumps

Organization:
IPC - Association Connecting Electronics Industries
Year: 1999

Abstract: This standard establishes the construction detail requirements for bumps and other terminal structures on flip chips and chip scale carriers. All flip chip and chip scale device terminals shall meet the designated standards detailed in this document which includes such diverse terminations as solder bumps, columns, non-melting stand-offs and conductive polymer deposits. The specific standards for different terminations will therefore be appropriately matched to the particular interconnection.
URI: http://yse.yabesh.ir/std;jsery=autho162s7D83081DAC426159DD6EFDEC014A/handle/yse/229658
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    IPC IPC/EIA J-STD-028

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contributor authorIPC - Association Connecting Electronics Industries
date accessioned2017-09-04T18:48:23Z
date available2017-09-04T18:48:23Z
date copyright08/01/1999
date issued1999
identifier otherKOSHKAAAAAAAAAAA.pdf
identifier urihttp://yse.yabesh.ir/std;jsery=autho162s7D83081DAC426159DD6EFDEC014A/handle/yse/229658
description abstractThis standard establishes the construction detail requirements for bumps and other terminal structures on flip chips and chip scale carriers. All flip chip and chip scale device terminals shall meet the designated standards detailed in this document which includes such diverse terminations as solder bumps, columns, non-melting stand-offs and conductive polymer deposits. The specific standards for different terminations will therefore be appropriately matched to the particular interconnection.
languageEnglish
titleIPC IPC/EIA J-STD-028num
titlePerformance Standard for Construction of Flip Chip and Chip Scale Bumpsen
typestandard
page36
statusActive
treeIPC - Association Connecting Electronics Industries:;1999
contenttypefulltext
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