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IPC IPC/JEDEC-9704A

Printed Circuit Assembly Strain Gage Test Guideline

Organization:
IPC - Association Connecting Electronics Industries
Year: 2012

Abstract: This document is meant to be used as a methodology for strain gage placement and subsequent testing of Printed Circuit Assemblies (PCAs) using strain gages. The method describes specific guidelines for strain gage testing of PCAs during the printed board manufacturing process, including assembly, test, system integration, and other types of operations that may induce board flexure.
The suggested procedure enables printed board assemblers to conduct strain gage testing independently, and provides a quantitative method for measuring board flexure, and assessing risk levels.
• The topics covered include:
• Test setup and equipment requirements
• Strain measurement
• Report format
This document assumes the methodology is being used to test a surface mount device such as Ball Grid Array (BGA), Small Outline Package (SOP), Chip Scale (Size) Package (CSP), and area-array surface mount (SMT) connectors/sockets. In certain cases, the described test approach may be used for non-area-array discrete SMT devices such as capacitors or resistors.
Purpose
Strain gage testing allows objective analysis of the strain and strain rate levels to which a surface mount component may be subjected during PCA assembly, test, and operation.
Characterization of worst-case PCA strain is critical due to the susceptibility of component interconnects to strain-induced failures. Excessive strain can result in various failure modes for different solder alloys, package types, surface finishes, or laminate materials. Such failures include solder ball cracking, trace damage, laminate related adhesive failure (pad lifting) or cohesive failure (pad cratering) and package substrate cracking
URI: http://yse.yabesh.ir/std;jsery=authoF2376596FCDCAC426159DD6E273C9FCD/handle/yse/175775
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  • IPC - Association Connecting Electronics Industries
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contributor authorIPC - Association Connecting Electronics Industries
date accessioned2017-09-04T17:52:38Z
date available2017-09-04T17:52:38Z
date copyright02/01/2012
date issued2012
identifier otherFCJGUEAAAAAAAAAA.pdf
identifier urihttp://yse.yabesh.ir/std;jsery=authoF2376596FCDCAC426159DD6E273C9FCD/handle/yse/175775
description abstractThis document is meant to be used as a methodology for strain gage placement and subsequent testing of Printed Circuit Assemblies (PCAs) using strain gages. The method describes specific guidelines for strain gage testing of PCAs during the printed board manufacturing process, including assembly, test, system integration, and other types of operations that may induce board flexure.
The suggested procedure enables printed board assemblers to conduct strain gage testing independently, and provides a quantitative method for measuring board flexure, and assessing risk levels.
• The topics covered include:
• Test setup and equipment requirements
• Strain measurement
• Report format
This document assumes the methodology is being used to test a surface mount device such as Ball Grid Array (BGA), Small Outline Package (SOP), Chip Scale (Size) Package (CSP), and area-array surface mount (SMT) connectors/sockets. In certain cases, the described test approach may be used for non-area-array discrete SMT devices such as capacitors or resistors.
Purpose
Strain gage testing allows objective analysis of the strain and strain rate levels to which a surface mount component may be subjected during PCA assembly, test, and operation.
Characterization of worst-case PCA strain is critical due to the susceptibility of component interconnects to strain-induced failures. Excessive strain can result in various failure modes for different solder alloys, package types, surface finishes, or laminate materials. Such failures include solder ball cracking, trace damage, laminate related adhesive failure (pad lifting) or cohesive failure (pad cratering) and package substrate cracking
languageEnglish
titleIPC IPC/JEDEC-9704Anum
titlePrinted Circuit Assembly Strain Gage Test Guidelineen
typestandard
page32
statusActive
treeIPC - Association Connecting Electronics Industries:;2012
contenttypefulltext
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