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JEDEC JESD12
Standard for Gate Array Benchmark Set
Organization:
JEDEC - Solid State Technology Association
Year: 1985
Abstract: The purpose of these benchmarks is to provide a common set of high level functions which serve as vehicles for comparing the performance of gate arrays implemented in any technology using any internal structure. These benchmarks effectively provide an unbiased measure of gate array vendors' ability to implement a desired complex function on a particular gate array at a known level of performance.
Subject: Cell Based - Integrated Circuits
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| contributor author | JEDEC - Solid State Technology Association | |
| date accessioned | 2017-09-04T17:09:44Z | |
| date available | 2017-09-04T17:09:44Z | |
| date copyright | 01/01/1985 | |
| date issued | 1985 | |
| identifier other | YNVSCAAAAAAAAAAA.pdf | |
| identifier uri | http://yse.yabesh.ir/std;quein=autho123393FD081DAC4/handle/yse/133277 | |
| description abstract | The purpose of these benchmarks is to provide a common set of high level functions which serve as vehicles for comparing the performance of gate arrays implemented in any technology using any internal structure. These benchmarks effectively provide an unbiased measure of gate array vendors' ability to implement a desired complex function on a particular gate array at a known level of performance. | |
| language | English | |
| title | JEDEC JESD12 | num |
| title | Standard for Gate Array Benchmark Set | en |
| type | standard | |
| page | 14 | |
| status | Active | |
| tree | JEDEC - Solid State Technology Association:;1985 | |
| contenttype | fulltext | |
| subject keywords | Cell Based - Integrated Circuits | |
| subject keywords | Gate Array - Performance |