JEDEC - Solid State Technology Association: Recent submissions
Now showing items 361-369 of 369
-
JEDEC JESD22-A101C
Abstract: This standard establishes a defined method and conditions for performing a temperature humidity life test with bias applied. The test is used to evaluate the reliability of non-hermetic packaged solid state devices in humid ...Subject(s) : Bias Life , Life Test , Temperature Humidity , Test Method - Humidity Bias Life , THB , -
JEDEC JESD321C
Abstract: This Standard gives the system for numbering like-named electrodes or terminal functions in semiconductor devices and for assigning numerical designations to unite of multiple-unit semiconductor devices. It applies to both ... -
JEDEC JESD82-16A
Abstract: This standard defines standard specifications of dc interface parameters, switching parameters, and test loading for definition of the SSTUA32866 registered buffer with parity test for DDR2 RDIMM applications. The purpose ...Subject(s) : DDR2 , RDIMM , Register , Registered Buffer , SSTU , SSTUA32866 , -
JEDEC JESD212B
Abstract: This document defines the Graphics Double Data Rate 5 (GDDR5) Synchronous Graphics Random Access Memory (SGRAM) standard, including features, functionality, package, and pin assignments. This scope may be expanded in future ... -
JEDEC JEP144
Abstract: The intent of this document is to give guidance on the Residual Gas Analysis (RGA) process and surrounding issues. The guideline describes how to select a suitable test lab and includes RGA history, measurement methodology, ...Subject(s) : Gas Analysis , Potential Contributors , Residual , -
JEDEC JESD22-B118
Abstract: Semiconductor wafer and die backside external visual inspection is an examination of the external nonactive surface area (hereafter called backside) of processed semiconductor wafers or die. This inspection method is for ... -
JEDEC JESD82-23
Abstract: This standard defines standard specifications of DC interface parameters, switching parameters, and test loading for definition of the SSTUA32S869 and SSTUA32D869 registered buffer with parity for driving heavy load on ...Subject(s) : Buffer , DDR2 , Parity , RDIMM , Register , SSTU , SSTUA , -
JEDEC JESD82-18A
Abstract: This standard defines standard specifications of dc interface parameters, switching parameters, and test loading for definition of the CUA877 and CU2A877 PLL clock devices for registered DDR2 DIMM applications.The purpose ...Subject(s) : CU2A877 , CUA877 , DDR2 , DIMM , PLL , RDIMM , Zero Delay Buffer , -
JEDEC JESD84-B42
Abstract: The purpose of the specification is the definition of the eMMC, its environment and handling. It provides guidelines for systems designers. The specification also defines a tool box (a set of macro functions and algorithms) ...Subject(s) : Electrical , eMMC , Flash , High Capacity , MMC , MMCA ,