JEDEC JESD61A.01
Isothermal Electromigration Test Procedure
Organization:
JEDEC - Solid State Technology Association
Year: 2007
Abstract: This standard describes an algorithm for the execution of the isothermal test, using computer-controlled instrumentation. The primary use of this test is for the monitoring of microelectronic metallization lines at wafer level (1) in process development, to evaluate process options, (2) in manufacturing, to monitor metallization reliability and (3) to monitor/evaluate process equipment. While it is developed as a fast WLR test, it can also be an effective tool for complementing the reliability data obtained through the standard package level electromigration test.
Subject: Electromigration
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JEDEC JESD61A.01
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contributor author | JEDEC - Solid State Technology Association | |
date accessioned | 2017-09-04T15:43:53Z | |
date available | 2017-09-04T15:43:53Z | |
date copyright | 39356 | |
date issued | 2007 | |
identifier other | PNMVKCAAAAAAAAAA.pdf | |
identifier uri | http://yse.yabesh.ir/std;quein=autho123393FD081DAC4/handle/yse/46229 | |
description abstract | This standard describes an algorithm for the execution of the isothermal test, using computer-controlled instrumentation. The primary use of this test is for the monitoring of microelectronic metallization lines at wafer level (1) in process development, to evaluate process options, (2) in manufacturing, to monitor metallization reliability and (3) to monitor/evaluate process equipment. While it is developed as a fast WLR test, it can also be an effective tool for complementing the reliability data obtained through the standard package level electromigration test. | |
language | English | |
title | JEDEC JESD61A.01 | num |
title | Isothermal Electromigration Test Procedure | en |
type | standard | |
page | 50 | |
status | Active | |
tree | JEDEC - Solid State Technology Association:;2007 | |
contenttype | fulltext | |
subject keywords | Electromigration | |
subject keywords | Isothermal | |
subject keywords | Metallization Lines | |
subject keywords | Test | |
subject keywords | Wafer-Level |