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JEDEC JESD8-9B

Stub Series Terminated Logic for 2.5 Volts (SSTL_2) - ERRATA: October 18, 2002

Organization:
JEDEC - Solid State Technology Association
Year: 2002

Abstract: This standard defines the input, output specifications and ac test conditions for devices that are designed to operate in the SSTL_2 logic switching range, nominally 0 V to 2.5 V. The standard may be applied to ICs operating with separate VDD and VDDQ supply voltages. This standard has been developed particularly with the objective of providing a relatively simple upgrade path from MOS push-pull interface designs. The standard is particularly intended to improve operation in situations where busses must be isolated from relatively large stubs.
URI: http://yse.yabesh.ir/std;query=autho1826AF679D/handle/yse/132495
Subject: 2.5 V
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contributor authorJEDEC - Solid State Technology Association
date accessioned2017-09-04T17:08:59Z
date available2017-09-04T17:08:59Z
date copyright05/01/2002
date issued2002
identifier otherYLULABAAAAAAAAAA.pdf
identifier urihttp://yse.yabesh.ir/std;query=autho1826AF679D/handle/yse/132495
description abstractThis standard defines the input, output specifications and ac test conditions for devices that are designed to operate in the SSTL_2 logic switching range, nominally 0 V to 2.5 V. The standard may be applied to ICs operating with separate VDD and VDDQ supply voltages. This standard has been developed particularly with the objective of providing a relatively simple upgrade path from MOS push-pull interface designs. The standard is particularly intended to improve operation in situations where busses must be isolated from relatively large stubs.
languageEnglish
titleJEDEC JESD8-9Bnum
titleStub Series Terminated Logic for 2.5 Volts (SSTL_2) - ERRATA: October 18, 2002en
typestandard
page30
statusActive
treeJEDEC - Solid State Technology Association:;2002
contenttypefulltext
subject keywords2.5 V
subject keywordsLogic Switching
subject keywordsOutput Drivers
subject keywordsSSTL - SSTL_2
subject keywordsStub Series - Terminated Logic
subject keywordsSupply Voltage
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