درباره ما
JEDEC JESD51-4
Thermal Test Chip Guideline (Wire Bond Type Chip) - Errata - September 1997; Replaces JEP129: 1997
Organization:
JEDEC - Solid State Technology Association
Year: 1997
Abstract: This guideline describes design requirements for wire bond type semiconductor chips to be used for thermal resistance listing of IC packages. This document provides specific guidelines for chip design but allows flexibility in the materials and layout requirements.
Subject: Chip - Thermal Test
Collections
:
Show full item record
| contributor author | JEDEC - Solid State Technology Association | |
| date accessioned | 2017-09-04T15:15:06Z | |
| date available | 2017-09-04T15:15:06Z | |
| date copyright | 02/01/1997 | |
| date issued | 1997 | |
| identifier other | MFHHCAAAAAAAAAAA.pdf | |
| identifier uri | http://yse.yabesh.ir/std;query=autho1826AF679D/handle/yse/14007 | |
| description abstract | This guideline describes design requirements for wire bond type semiconductor chips to be used for thermal resistance listing of IC packages. This document provides specific guidelines for chip design but allows flexibility in the materials and layout requirements. | |
| language | English | |
| title | JEDEC JESD51-4 | num |
| title | Thermal Test Chip Guideline (Wire Bond Type Chip) - Errata - September 1997; Replaces JEP129: 1997 | en |
| type | standard | |
| page | 14 | |
| status | Active | |
| tree | JEDEC - Solid State Technology Association:;1997 | |
| contenttype | fulltext | |
| subject keywords | Chip - Thermal Test | |
| subject keywords | Thermal Test Chip | |
| subject keywords | Wire Bond Type Chip |