JEDEC JESD80

Standard for Description of 2.5 V CMOS Logic Devices

contributor author	JEDEC - Solid State Technology Association
date accessioned	2017-09-04T15:16:49Z
date available	2017-09-04T15:16:49Z
date copyright	36465
date issued	1999
identifier other	ARXYJAAAAAAAAAAA.pdf
identifier uri	http://yse.yabesh.ir/std;query=autho1826AF679D/handle/yse/16124
description abstract	The purpose of this standard is to provide a standard for 2.5 V nominal supply-voltage CMOS logic devices, for uniformity, multiplicity of sources, elimination of confusion, ease of device specification, and ease of use. This standard defines dc interface parameters and test loading for CMOS digital logic family based on 2.5 V (nominal) power supply levels at 2.5 V input tolerance.
language	English
title	JEDEC JESD80	num
title	Standard for Description of 2.5 V CMOS Logic Devices	en
type	standard
page	10
status	Active
tree	JEDEC - Solid State Technology Association:;1999
contenttype	fulltext
subject keywords	CMOS Logic Devices
subject keywords	DC Interface Parameters
subject keywords	Nominal Supply Voltage - 2.5 V
subject keywords	Operating Voltages