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JEDEC JESD80

Standard for Description of 2.5 V CMOS Logic Devices

Organization:
JEDEC - Solid State Technology Association
Year: 1999

Abstract: The purpose of this standard is to provide a standard for 2.5 V nominal supply-voltage CMOS logic devices, for uniformity, multiplicity of sources, elimination of confusion, ease of device specification, and ease of use. This standard defines dc interface parameters and test loading for CMOS digital logic family based on 2.5 V (nominal) power supply levels at 2.5 V input tolerance.
URI: http://yse.yabesh.ir/std;query=autho1826AF679D/handle/yse/16124
Subject: CMOS Logic Devices
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    JEDEC JESD80

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contributor authorJEDEC - Solid State Technology Association
date accessioned2017-09-04T15:16:49Z
date available2017-09-04T15:16:49Z
date copyright36465
date issued1999
identifier otherARXYJAAAAAAAAAAA.pdf
identifier urihttp://yse.yabesh.ir/std;query=autho1826AF679D/handle/yse/16124
description abstractThe purpose of this standard is to provide a standard for 2.5 V nominal supply-voltage CMOS logic devices, for uniformity, multiplicity of sources, elimination of confusion, ease of device specification, and ease of use. This standard defines dc interface parameters and test loading for CMOS digital logic family based on 2.5 V (nominal) power supply levels at 2.5 V input tolerance.
languageEnglish
titleJEDEC JESD80num
titleStandard for Description of 2.5 V CMOS Logic Devicesen
typestandard
page10
statusActive
treeJEDEC - Solid State Technology Association:;1999
contenttypefulltext
subject keywordsCMOS Logic Devices
subject keywordsDC Interface Parameters
subject keywordsNominal Supply Voltage - 2.5 V
subject keywordsOperating Voltages
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