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JEDEC JESD12-1B

Terms and Definitions for Gate Arrays and Cell-Based Digital Integrated Circuits

Organization:
JEDEC - Solid State Technology Association
Year: 1993

Abstract: The purpose of this standard is to promote the uniform use of abbreviations, terms, and definitions throughout the semiconductor industry. It is a useful guide for users, manufactures, educators, technical writers, and others interested in the characterization, nomenclature, and classification of semicustom integrated circuits.
URI: http://yse.yabesh.ir/std;query=autho1826AF679D/handle/yse/16936
Subject: Gate Array
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    JEDEC JESD12-1B

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contributor authorJEDEC - Solid State Technology Association
date accessioned2017-09-04T15:17:30Z
date available2017-09-04T15:17:30Z
date copyright01/01/1993
date issued1993
identifier otherMNEVCAAAAAAAAAAA.pdf
identifier urihttp://yse.yabesh.ir/std;query=autho1826AF679D/handle/yse/16936
description abstractThe purpose of this standard is to promote the uniform use of abbreviations, terms, and definitions throughout the semiconductor industry. It is a useful guide for users, manufactures, educators, technical writers, and others interested in the characterization, nomenclature, and classification of semicustom integrated circuits.
languageEnglish
titleJEDEC JESD12-1Bnum
titleTerms and Definitions for Gate Arrays and Cell-Based Digital Integrated Circuitsen
typestandard
page18
statusActive
treeJEDEC - Solid State Technology Association:;1993
contenttypefulltext
subject keywordsGate Array
subject keywordsSemicustom Integrated Circuits
subject keywordsTerms and Definitions - Cell-Based
subject keywordsTerms and Definitions - Gate Array
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