JEDEC JESD96A
Radio Front End-Baseband (RF-BB) Interface
Organization:
JEDEC - Solid State Technology Association
Year: 2006
Abstract: The normative information in this standard is intended to provide a technical design team to construct the interface on a FED and a BED such that they will operate correctly with each other (at the interface level), when designed to this specification. Additional informative information is provided in the appendices to help illustrate the normative material.
This document addresses the following interface topics:
1) RF-BB Electrical layer: time and amplitude specifications for lines, drivers, receivers, clocks;
2)RF-BB Link layer: bits, clock-data synchronization, power modes;
3) RF-BB Transport layer: data types, data framing, data bandwidth, connection to core IC;
4) RF-BB Interface Registers.
This document defines a high-speed serial link that enables the bi-directional transfer of data and control information between the FED and BED. The document does not mandate the use of specific signaling, standard framing or standard messaging needed to make this an interoperable interface standard for RF devices or BB devices.
This document addresses the following interface topics:
1) RF-BB Electrical layer: time and amplitude specifications for lines, drivers, receivers, clocks;
2)RF-BB Link layer: bits, clock-data synchronization, power modes;
3) RF-BB Transport layer: data types, data framing, data bandwidth, connection to core IC;
4) RF-BB Interface Registers.
This document defines a high-speed serial link that enables the bi-directional transfer of data and control information between the FED and BED. The document does not mandate the use of specific signaling, standard framing or standard messaging needed to make this an interoperable interface standard for RF devices or BB devices.
Subject: Baseband
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contributor author | JEDEC - Solid State Technology Association | |
date accessioned | 2017-09-04T15:44:51Z | |
date available | 2017-09-04T15:44:51Z | |
date copyright | 02/01/2006 | |
date issued | 2006 | |
identifier other | PQIWIBAAAAAAAAAA.pdf | |
identifier uri | http://yse.yabesh.ir/std;query=autho1826AF679D/handle/yse/47285 | |
description abstract | The normative information in this standard is intended to provide a technical design team to construct the interface on a FED and a BED such that they will operate correctly with each other (at the interface level), when designed to this specification. Additional informative information is provided in the appendices to help illustrate the normative material. This document addresses the following interface topics: 1) RF-BB Electrical layer: time and amplitude specifications for lines, drivers, receivers, clocks; 2)RF-BB Link layer: bits, clock-data synchronization, power modes; 3) RF-BB Transport layer: data types, data framing, data bandwidth, connection to core IC; 4) RF-BB Interface Registers. This document defines a high-speed serial link that enables the bi-directional transfer of data and control information between the FED and BED. The document does not mandate the use of specific signaling, standard framing or standard messaging needed to make this an interoperable interface standard for RF devices or BB devices. | |
language | English | |
title | JEDEC JESD96A | num |
title | Radio Front End-Baseband (RF-BB) Interface | en |
type | standard | |
page | 62 | |
status | Active | |
tree | JEDEC - Solid State Technology Association:;2006 | |
contenttype | fulltext | |
subject keywords | Baseband | |
subject keywords | Frequency | |
subject keywords | Front End | |
subject keywords | MAC | |
subject keywords | Phy | |
subject keywords | Radio | |
subject keywords | RF-BB | |
subject keywords | Wireless |