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JEDEC JESD75-4
Ball Grid Array Pinout for 1-, 2-, and 3-Bit Logic Functions
Organization:
JEDEC - Solid State Technology Association
Year: 2004
Abstract: This standard defines device pinout for 1-, 2- and 3-bit wide logic functions. This pinout specifically applies to the conversion of Dual-Inline-Packaged (DIP) 1-, 2- and 3-bit logic devices to DSBGA-packaged 1-, 2- and 3-bit logic devices.
Subject: Ball Grid Array
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| contributor author | JEDEC - Solid State Technology Association | |
| date accessioned | 2017-09-04T15:45:29Z | |
| date available | 2017-09-04T15:45:29Z | |
| date copyright | 03/01/2004 | |
| date issued | 2004 | |
| identifier other | PSGYEBAAAAAAAAAA.pdf | |
| identifier uri | http://yse.yabesh.ir/std;query=autho1826AF679D/handle/yse/48009 | |
| description abstract | This standard defines device pinout for 1-, 2- and 3-bit wide logic functions. This pinout specifically applies to the conversion of Dual-Inline-Packaged (DIP) 1-, 2- and 3-bit logic devices to DSBGA-packaged 1-, 2- and 3-bit logic devices. | |
| language | English | |
| title | JEDEC JESD75-4 | num |
| title | Ball Grid Array Pinout for 1-, 2-, and 3-Bit Logic Functions | en |
| type | standard | |
| page | 13 | |
| status | Active | |
| tree | JEDEC - Solid State Technology Association:;2004 | |
| contenttype | fulltext | |
| subject keywords | Ball Grid Array | |
| subject keywords | BGA | |
| subject keywords | DSBGA | |
| subject keywords | WCSP Logic |