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JEDEC JESD209-3
Low Power Double Data Rate 3 (LPDDR3)
| contributor author | JEDEC - Solid State Technology Association | |
| date accessioned | 2017-09-04T15:46:11Z | |
| date available | 2017-09-04T15:46:11Z | |
| date copyright | 05/01/2012 | |
| date issued | 2012 | |
| identifier other | PUJLVEAAAAAAAAAA.pdf | |
| identifier uri | http://yse.yabesh.ir/std;query=autho1826AF679D/handle/yse/48818 | |
| description abstract | This document defines the LPDDR3 specification, including features, functionalities, ACand DC characteristics, packages, and ball/signal assignments. The purpose of this specification is to define the minimum set of requirements for JEDEC compliant 4 Gb through 32 Gb for x16 and x32 SDRAM devices. This specification was created using aspects of the following specifications: DDR2 (JESD79-2), DDR3 (JESD79-3), LPDDR (JESD209), and LPDDR2 (JESD209-2). Each aspect of the specification was considered and approved by committee ballot(s). The accumulation of these ballots was then incorporated to prepare the LPDDR3 specification. | |
| language | English | |
| title | JEDEC JESD209-3 | num |
| title | Low Power Double Data Rate 3 (LPDDR3) | en |
| type | standard | |
| page | 140 | |
| status | Active | |
| tree | JEDEC - Solid State Technology Association:;2012 | |
| contenttype | fulltext |
