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JEDEC JESD209-3

Low Power Double Data Rate 3 (LPDDR3)

Organization:
JEDEC - Solid State Technology Association
Year: 2012

Abstract: This document defines the LPDDR3 specification, including features, functionalities, ACand DC characteristics, packages, and ball/signal assignments. The purpose of this specification is to define the minimum set of requirements for JEDEC compliant 4 Gb through 32 Gb for x16 and x32 SDRAM devices. This specification was created using aspects of the following specifications: DDR2 (JESD79-2), DDR3 (JESD79-3), LPDDR (JESD209), and LPDDR2 (JESD209-2). Each aspect of the specification was considered and approved by committee ballot(s). The accumulation of these ballots was then incorporated to prepare the LPDDR3 specification.
URI: http://yse.yabesh.ir/std;query=autho1826AF679D/handle/yse/48818
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    JEDEC JESD209-3

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contributor authorJEDEC - Solid State Technology Association
date accessioned2017-09-04T15:46:11Z
date available2017-09-04T15:46:11Z
date copyright05/01/2012
date issued2012
identifier otherPUJLVEAAAAAAAAAA.pdf
identifier urihttp://yse.yabesh.ir/std;query=autho1826AF679D/handle/yse/48818
description abstractThis document defines the LPDDR3 specification, including features, functionalities, ACand DC characteristics, packages, and ball/signal assignments. The purpose of this specification is to define the minimum set of requirements for JEDEC compliant 4 Gb through 32 Gb for x16 and x32 SDRAM devices. This specification was created using aspects of the following specifications: DDR2 (JESD79-2), DDR3 (JESD79-3), LPDDR (JESD209), and LPDDR2 (JESD209-2). Each aspect of the specification was considered and approved by committee ballot(s). The accumulation of these ballots was then incorporated to prepare the LPDDR3 specification.
languageEnglish
titleJEDEC JESD209-3num
titleLow Power Double Data Rate 3 (LPDDR3)en
typestandard
page140
statusActive
treeJEDEC - Solid State Technology Association:;2012
contenttypefulltext
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