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JEDEC JESD90
A Procedure for Measuring P-Channel MOSFET Negative Bias Temperature Instabilities
| contributor author | JEDEC - Solid State Technology Association | |
| date accessioned | 2017-09-04T16:03:34Z | |
| date available | 2017-09-04T16:03:34Z | |
| date copyright | 38292 | |
| date issued | 2004 | |
| identifier other | RQVQGBAAAAAAAAAA.pdf | |
| identifier uri | http://yse.yabesh.ir/std;query=autho1826AF679D/handle/yse/66829 | |
| description abstract | This document describes an accelerated stress and test methodology for measuring device parameter changes of a single p-channel MOSFET after Negative Bias Temperature Instability (NBTI) stress at dc bias conditions. This document gives a procedure to investigate NBTI stress in a symmetric voltage condition with the channel inverted (VGS < 0) and no channel conduction (VDS = 0).There can be NBTI degradation during channel conduction (VGS < 0, VDS < 0), however, this document does not cover this phenomena. | |
| language | English | |
| title | JEDEC JESD90 | num |
| title | A Procedure for Measuring P-Channel MOSFET Negative Bias Temperature Instabilities | en |
| type | standard | |
| page | 20 | |
| status | Active | |
| tree | JEDEC - Solid State Technology Association:;2004 | |
| contenttype | fulltext | |
| subject keywords | MOSFET | |
| subject keywords | NBTI | |
| subject keywords | Negative Bias | |
| subject keywords | P-Channel | |
| subject keywords | PMOS | |
| subject keywords | Temperature |
