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JEDEC JESD76-3
Standard Description of 1.5 V CMOS Logic Devices
Organization:
JEDEC - Solid State Technology Association
Year: 2001
Abstract: This standard continues the voltage specification migration to the next level beyond the 1.8 V specification already established. The purpose is to provide a standard for 1.5 V nominal supply voltage CMOS logic devices, for uniformity, multiplicity of sources, elimination of confusion, ease of device specification, and ease of use.
Subject: 1.5 V
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| contributor author | JEDEC - Solid State Technology Association | |
| date accessioned | 2017-09-04T15:08:48Z | |
| date available | 2017-09-04T15:08:48Z | |
| date copyright | 08/01/2001 | |
| date issued | 2001 | |
| identifier other | APKISAAAAAAAAAAA.pdf | |
| identifier uri | http://yse.yabesh.ir/std;query=autho1826AF679D/handle/yse/6691 | |
| description abstract | This standard continues the voltage specification migration to the next level beyond the 1.8 V specification already established. The purpose is to provide a standard for 1.5 V nominal supply voltage CMOS logic devices, for uniformity, multiplicity of sources, elimination of confusion, ease of device specification, and ease of use. | |
| language | English | |
| title | JEDEC JESD76-3 | num |
| title | Standard Description of 1.5 V CMOS Logic Devices | en |
| type | standard | |
| page | 10 | |
| status | Active | |
| tree | JEDEC - Solid State Technology Association:;2001 | |
| contenttype | fulltext | |
| subject keywords | 1.5 V | |
| subject keywords | CMOS |