JEDEC JESD24-3

Thermal Impedance Measurements for Vertical Power MOSFETs (Delta Source-Drain Voltage Method) - Addendum to JEDEC JESD 24

contributor author	JEDEC - Solid State Technology Association
date accessioned	2017-09-04T17:18:22Z
date available	2017-09-04T17:18:22Z
date copyright	11/01/1990 (R 2002)
date issued	2002
identifier other	ZKTZJBAAAAAAAAAA.pdf
identifier uri	http://yse.yabesh.ir/std;quessionid=2A40ear/handle/yse/141731
description abstract	The purpose of this test method is to measure the thermal impedance of the MOSFET under the specified conditions of applied voltage, current and pulse duration. The temperature sensitivity if the forward voltage drop of the source-drain is used as the junction temperature indicator. This method is particularly suitable to enhancement mode, power MOSFETs having relatively long thermal response times. This test method may be used to measure the thermal response of junction to a heating pulse, to ensure proper die mountdown to its case, or the dc thermal resistance, by the proper choice of the pulse duration and magnitude if the heating pulse.
language	English
title	JEDEC JESD24-3	num
title	Thermal Impedance Measurements for Vertical Power MOSFETs (Delta Source-Drain Voltage Method) - Addendum to JEDEC JESD 24	en
type	standard
page	22
status	Active
tree	JEDEC - Solid State Technology Association:;2002
contenttype	fulltext
subject keywords	Delta Source-Drain Voltage Method
subject keywords	MOSFETs
subject keywords	Thermal Impedance Measurements - Vertical Power MOSFETs
subject keywords	Vertical Power MOSFETs