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JEDEC JESD82-4B

Definition of the SSTV16859 2.5 V 13-Bit to 26-Bit SSTL_2 Registered Buffer for Stacked DDR DIMM Applications

Organization:
JEDEC - Solid State Technology Association
Year: 2003

Abstract: This standard defines standard specifications of dc interface parameters, switching parameters, and test loading for definition of the SSTV16859 13-bit to 26-bit SSTL_2 registered buffer for stacked DDR DIMM applications. The purpose is to provide a standard for the SSTV16859 logic device, for uniformity, multiplicity of sources, elimination of confusion, ease of device specification, and ease of use.
URI: http://yse.yabesh.ir/std;quessionid=2A40ear/handle/yse/151177
Subject: DIMM
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    JEDEC JESD82-4B

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contributor authorJEDEC - Solid State Technology Association
date accessioned2017-09-04T17:28:01Z
date available2017-09-04T17:28:01Z
date copyright05/01/2003
date issued2003
identifier otherCOMZCBAAAAAAAAAA.pdf
identifier urihttp://yse.yabesh.ir/std;quessionid=2A40ear/handle/yse/151177
description abstractThis standard defines standard specifications of dc interface parameters, switching parameters, and test loading for definition of the SSTV16859 13-bit to 26-bit SSTL_2 registered buffer for stacked DDR DIMM applications. The purpose is to provide a standard for the SSTV16859 logic device, for uniformity, multiplicity of sources, elimination of confusion, ease of device specification, and ease of use.
languageEnglish
titleJEDEC JESD82-4Bnum
titleDefinition of the SSTV16859 2.5 V 13-Bit to 26-Bit SSTL_2 Registered Buffer for Stacked DDR DIMM Applicationsen
typestandard
page17
statusActive
treeJEDEC - Solid State Technology Association:;2003
contenttypefulltext
subject keywordsDIMM
subject keywordsRegistered Buffer
subject keywordsSSTV16859
subject keywordsStacked DDR
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