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Property Specification Language (PSL) - IEEE Computer Society

contributor authorIEEE - The Institute of Electrical and Electronics Engineers, Inc.
date accessioned2017-09-04T16:40:31Z
date available2017-09-04T16:40:31Z
date copyright03/25/2010
date issued2010
identifier otherVNODSDAAAAAAAAAA.pdf
identifier urihttps://yse.yabesh.ir/std/handle/yse/104077
description abstractThis standard defines the property specification language (PSL), which formally describes electronic system behavior. This standard specifies the syntax and semantics for PSL and also clarifies how PSL interfaces with various standard electronic system design languages.
Purpose
The purpose of this standard is to provide a well-defined language for formal specification of electronic system behavior, one that is compatible with multiple electronic system design languages, including IEEE Std 1076™ (VHDL®),1 IEEE Std 1364™ (Verilog®), IEEE Std 1800™ (SystemVerilog®), and IEEE Std 1666™ (SystemC®), to facilitate a common specification and verification flow for multi-language and mixed-language designs.
This standard creates an updated IEEE standard based upon IEEE Std 1850-2005. The updated standard will refine IEEE standard, addressing errata, minor technical issues, and proposed extensions specifically related to property reuse and improved simulation usability.
1Information on references can be found in Clause 2.
languageEnglish
titleIEEE 1850num
titleProperty Specification Language (PSL) - IEEE Computer Societyen
typestandard
page182
statusActive
treeIEEE - The Institute of Electrical and Electronics Engineers, Inc.:;2010
contenttypefulltext
subject keywordsABV
subject keywordsassertion
subject keywordsassertion-based verification
subject keywordsassumption
subject keywordscover
subject keywordsmodel checking
subject keywordsproperty
subject keywordsPSL
subject keywordsspecification
subject keywordstemporal logic
subject keywordsverification


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