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DSCC-VID-V62/08602
MICROCIRCUIT, DIGITAL, CMOS, 24-BIT TO 48-BIT REGISTERED BUFFER WITH SSTL_2 INPUTS AND OUTPUTS, MONOLITHIC SILICON
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DLA - CC - DLA Land and Maritime
Year: 2007
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DSCC-VID-V62/08602
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| contributor author | DLA - CC - DLA Land and Maritime | |
| date accessioned | 2017-09-04T18:08:27Z | |
| date available | 2017-09-04T18:08:27Z | |
| date copyright | 39388 | |
| date issued | 2007 | |
| identifier other | GRWGBCAAAAAAAAAA.pdf | |
| identifier uri | https://yse.yabesh.ir/std/handle/yse/191480 | |
| language | English | |
| title | DSCC-VID-V62/08602 | num |
| title | MICROCIRCUIT, DIGITAL, CMOS, 24-BIT TO 48-BIT REGISTERED BUFFER WITH SSTL_2 INPUTS AND OUTPUTS, MONOLITHIC SILICON | en |
| type | standard | |
| page | 12 | |
| status | Active | |
| tree | DLA - CC - DLA Land and Maritime:;2007 | |
| contenttype | fulltext |