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Detail Specification for Adaptor – Carrier Quad Flatpack to Pin Grid Array Sockets for Use in Electronic Equipment - Stabilized: April 2013

contributor authorECIA - Electronic Components Industry Association
date accessioned2017-09-04T18:16:30Z
date available2017-09-04T18:16:30Z
date copyright01/23/1992 (S 2013)
date issued2013
identifier otherHMZTCAAAAAAAAAAA.pdf
identifier urihttps://yse.yabesh.ir/std/handle/yse/199405
description abstractThe Quad Flat Pack carrier of assessed quality covered by this detail specification shall have:
a) Maximum enclosure dimensions (See Figure 1 and Table 1).
b) Working vdtage not to exceed 250 volts (rms).
c) Current not to exceed one ampere per pin or per semiconductor package manufacturer's recommendations.
OBJECT
The object of this Detail Specification is to provide all information required, using Sectional Specification EiA-540A000 as a base, for the identification and quality assessment of Quad Flat- pack Carrier with sdder land areas for attaching surface mount devices. The surface mount device having 1.0 mm (.039 in.), 0.8 mm (.031 in.), 0.65 mm (.0256 in.), 0.5 mrn (.0197 in.) or 0.4 mm (.0157 in.) lead pitches. Termination pins on carrier formatted on 2.54 mm X 2.54 mm (.l00 in. X .l00 in.) grid for interfacing directly to a printed wiring board or plugging into pin grid array sockets. The information contained herein or by reference is complete and sufficient for inspection purposes. This device is designed to be used with EIA-540 documents, EIA-540BAAA, EIA-540BAAB, EIA-540BAAC and EIA- 540BAAD.
languageEnglish
titleECA EIA-540ADAAnum
titleDetail Specification for Adaptor – Carrier Quad Flatpack to Pin Grid Array Sockets for Use in Electronic Equipment - Stabilized: April 2013en
typestandard
page0
statusActive
treeECIA - Electronic Components Industry Association:;2013
contenttypefulltext


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